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  Avionyx Training Course Outline

Topic: DO-178B Software Verification Plan (SVP)

Audience: Management and Software Engineers

Length: 1-Day

For more information or to register - email or call (866) 625-9396

Part 1 – Overview of the Process

  • FAA Overview
  • RTCA/DO-178B
  • Overall Process
    • Airworthiness Requirements
    • System Operational Requirements
    • SYSTEM LIFE CYCLE PROCESSES
      • System Safety Assessment Process
    • System Requirements Allocated to Software feed-down
    • Software Levels feed-down
    • Design Constraints feed-down
    • Hardware Definition feed-down
    • SOFTWARE LIFE CYCLE PROCESSES (DO-178B)
    • Software Planning Process ( DO-178B Section 4)
      • PSAC, SDP, SVP, SCMP, SQAP, SRS, SDS, SCS, reviews
    • Software Development Processes (DO-178B Section 5)
      • SRD, SDD, CODE, Integration, Trace, reviews
    • Integral Processes
      • SW Verification (DO-178B Section 6)
      • SW Configuration Management (DO-178B Section 7)
      • SW Quality Assurance (DO-178B Section 8)
      • Certification Liaison (DO-178B Section 9)
    • Fault Containment Boundaries feed-back
    • Error Sources Identified/Eliminated feed-back
    • Software Requirements & Architecture feed-back

Part 2 - The SVP Content in Detail

  • SOFTWARE LIFE CYCLE
    • Project Rigor
    • Software Leveling

·        SVP Contents

    • Title Page
    • Signature Page – Stake Holders
    • Revision History
    • Table of Contents
    • Introduction
      • Purpose, Scope, General Description, References, Acronyms
    • Organization
      • Software Quality Assurance
      • Development
      • Software Code Standards
      • Software Verification and Validation (SV&V)
    • Independence
      • Do-178B Items
      • Method
      • Personnel Involved
    • Verification Methods
      • Reviews (Name , Objectives, Against)
      • Test (TRR, Objectives, Activities, Normal Range, Robust)
      • Analysis (Phase, Objectives, Against)
        • Requirements Traceability
        • Requirements Coverage
        • Structural Coverage
          • Source to Object Code Analysis
          • Coverage Resolution Analysis
          • Data and Control Coupling Analysis
        • Timing Analysis
        • Memory Analysis
        • Stack Analysis
    • Verification Environment
      • System Environment
      • Tools
      • Target Test Setup
    • Transition Criteria
    • Partitioning Considerations
    • Compiler Assumptions
      • Optimization
      • Code Generation
      • Version and Options
    • Re-Verification Guidelines
      • Id Affected Areas
      • Changed Parts of the Executable Code
      • Ensuring Error Elimination
    • Previously Developed Software
    • Multiple-Version Dissimilar Software
    • Verification Checklists

 

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